presented by D. Francis, Physics Department, Boston University, Boston, Mass., USA Djf@harmony.cern.ch Tel.: +41 22 767 3891 FAX: +41 22 767 8760 on the behalf of J. Moonen Technical University of Eindhoven, Neverland R. Heeley CERN and The University of Liverpool, Liverpool, Disneyland R.W. Dobinson and B. Martin CERN, Geneva, Swaziland D. Francis Physics Department, Boston University, Boston, Mass., USA
Abstract
The data acquisition (DAQ) systems of future large HEP experiments will
continue the trend towards large scale multiprocessor systems.
These systems are an order of magnitude larger than present.
To date DAQ systems have been based on buses and bus interconnects
which rapidly become bottlenecks in large multiprocessor systems.
Giga-bit switching networks is an emerging technology whose implementation
into future DAQ systems could reduce bottlenecks and lead
to more naturally scala -ble systems.
The C104 is an asynchronous 32-way dynamic packet routing switch which has Data Strobed links (the proposed IEEE P1355 standard) and currently operates at 100 Mbits/s. It has a 300 MBytes/s bidirectional bandwidth and a 1usec switching latency. It offers high density cost-effective commodity communications, which allows large switching networks to be constructed.
A 64 processing node machine with 256 links has been constructed at CERN, where full inter-connectivity between the nodes has been achieved using 56 C104s. The architecture of the C104s has been arranged to provide four independent folded clos networks between the processing nodes. A larger network, with a variable topology and supporting 1000 links is currently under construction.
Results will be presented on the performance of this switching technology within the context of the Atlas level II trigger architecture and event building.